Stability enhancement method for interleaved boost converter based on virtual DC machine and passivity-based control

1 Introduction

DC/DC converters are widely employed in dc distribution systems and motor-drive power supplies, where they provide voltage conversion, dc-bus regulation, and bidirectional or unidirectional power-flow control (Memon et al., 2024; Mathesh and Saravanakumar, 2023; Saravanakumar and Saravana Kumar, 2022). In dc distribution systems, DC/DC converters are used to interface distributed generation and energy-storage units operating at different voltage levels and to maintain the stability of the common dc bus (Memon et al., 2024). In motor-drive power supplies, source-side DC/DC converters regulate the dc-link voltage and coordinate the power transferred from batteries, fuel cells, and other dc sources to motor-drive inverters (Mathesh and Saravanakumar, 2023).

However, tightly regulated power-electronic loads and motor-drive systems may exhibit constant-power-load characteristics within their control bandwidth. The negative incremental impedance associated with constant-power operation can intensify dynamic interactions between the source-side converter and downstream loads, reduce the effective damping of the dc bus, and even destabilize the system under severe disturbances (Zheng et al., 2023; Alidrissi et al., 2022). Moreover, unlike rotating electrical machines, power-electronic converters do not inherently possess electromechanical inertia. During transient power imbalances caused by input-voltage variations, abrupt load changes, or rapid changes in motor operating conditions, the energy mismatch is mainly absorbed by the dc-bus capacitor. Owing to the limited energy-storage capacity of the capacitor, the dc-bus voltage may exhibit considerable overshoot or undershoot, potentially leading to the unintended activation of overvoltage or undervoltage protection. Therefore, the control strategy should not only suppress the destabilizing effect of constant-power loads, but also provide sufficient virtual inertia and damping to improve the transient voltage response.

Among the available step-up conversion topologies, the Boost converter has been extensively adopted because of its simple structure, low component count, and relatively low voltage stress on the semiconductor switch. When the converter power rating increases or the source-current ripple must be limited, multiphase interleaving can distribute the current stress among parallel branches and partially cancel the input-current ripple. Accordingly, the interleaved Boost converter is particularly suitable for medium-power and high-power-density interfaces in dc distribution and motor-drive systems (Pattanaik et al., 2024; Denholm et al., 2024; Zhou et al., 2024; Xing et al., 2022). However, conventional DC/DC converters are predominantly based on Si MOSFETs, whose switching losses and parasitic characteristics constrain further increases in switching frequency and reductions in converter volume. Compared with conventional Si MOSFETs, GaN devices feature higher switching speed, lower switching loss, and smaller parasitic parameters, which facilitate higher switching frequencies, smaller passive components, and improved power density and conversion efficiency (Chen et al., 2017; Fan et al., 2024; Carbone et al., 2019; Tong et al., 2024; Jones et al., 2016; Liu et al., 2019; Lai et al., 2024; Wang et al., 2023; Zheng et al., 2023; Alidrissi et al., 2022).

To overcome the limitations of linear control methods under nonlinear, strong-disturbance, and wide-operating-range conditions, nonlinear control methods such as sliding mode control (SMC) (Yue et al., 2025; Jaganathan et al., 2024), model predictive control (MPC) (Tao et al., 2026; Dong et al., 2024), fuzzy logic control (FLC) (Ertekin et al., 2024), passivity-based control (PBC) (Ao et al., 2024), and virtual DC machine (VDCM) control (Song et al., 2024) have been widely applied to DC-DC converters. In (Jaganathan et al., 2024), SMC was applied to a three-phase interleaved bidirectional Buck-Boost system, improving the response speed and disturbance rejection capability of the system and enhancing current-sharing accuracy over the full duty-cycle range. However, the inherent chattering problem of SMC was not effectively suppressed, which may lead to additional losses and noise. Nevertheless, the introduction of low-pass filters and variable-structure control methods increases the controller design complexity and system cost. MPC can explicitly handle system constraints and has demonstrated good control performance in photovoltaic hybrid energy storage systems (Tao et al., 2026; Dong et al., 2024). However, it usually requires online optimization in each control cycle, resulting in a heavy computational burden, especially in multivariable systems with complex constraints. FLC does not rely on an accurate mathematical model, which is suitable for complex power converter control and can provide fast dynamic response (Ertekin et al., 2024). However, its rule base and membership functions generally depend on expert experience, and the lack of a unified systematic design method makes it difficult to guarantee optimal control performance. PBC has clear physical interpretation, a relatively simple controller structure, and no dependence on a specific load type, while also ensuring global system stability (Ao et al., 2024). However, steady-state errors may occur under large disturbances. VDCM control enables a DC-DC converter to exhibit inertia and damping characteristics similar to a DC machine through control algorithms, thereby enhancing the voltage support capability of the DC bus. Reference (Song et al., 2024) shows that VDCM control can improve the gain margin and phase margin of a DC system and enhance its ability to maintain DC bus voltage stability under disturbances. However, the introduced equivalent inertia and damping may also prolong the time required for the system to return to steady state. In addition to the aforementioned nonlinear control methods, advanced intelligent control strategies such as neural network control (He et al., 2025) and genetic algorithm control (Ayad et al., 2023) have also been introduced into DC-DC converter control. These methods have certain advantages in handling complex nonlinear systems, but they generally suffer from high computational complexity and strong dependence on parameter settings. In particular, neural network control requires a large amount of training data and long training time, imposing higher requirements on hardware computing capability.

In summary, existing control methods still have difficulty in effectively meeting the stable control requirements of fuel-cell power supplies under full-operating-condition operation. To address the output DC bus voltage overshoot and fluctuation caused by transient variations in circuit parameters, this paper proposes a VDCM + PBC composite stabilization control strategy for a DC-DC converter connected to the output side of a fuel cell, targeting a power supply system with a fuel cell as the main power source. In the proposed strategy, VDCM control is adopted in the voltage outer loop to provide equivalent inertia and damping support for the DC bus, while PBC is adopted in the current inner loop to improve current regulation performance and system stability, thereby enhancing the dynamic response and steady-state regulation performance of the converter. In the proposed composite control architecture, the two controllers can respectively compensate for different dynamic drawbacks of the converter. The PBC current loop injects damping from the error-energy perspective and directly improves inductor-current tracking under the negative damping effect of CPLs, whereas the VDCM voltage loop reshapes the outer-loop voltage dynamics by introducing virtual inertia and damping. Therefore, VDCM and PBC are complementary: the former suppresses abrupt dc-bus voltage excursions by moderating the current-reference variation, while the latter ensures that the converter current follows the reference with an energy-dissipating mechanism.

To verify the effectiveness of the proposed strategy, a GaN-based interleaved Boost converter prototype with a rated power of 3 kW and a power density of 9 kW/L is developed. Experiments are conducted under wide input-voltage variations, large-range load power switching, and steady-state operation at different load power levels, and comparisons are made with PI + PI and PI + PBC control. The experimental results verify the correctness and effectiveness of the proposed VDCM + PBC composite control strategy.

2 Interleaved boost converter and mathematical model

2.1 Converter topology and mathematical model

The system studied in this paper is a two-phase interleaved Boost converter, as shown in Figure 1. The two-phase power branches consist of boost inductors L 1, L 2, switches Q 1, Q 2, and diodes D 1, D 2. The output side is composed of a filter capacitor C o and a constant-power load (CPL). The input voltage, output dc-bus voltage, phase currents, and duty ratios are denoted by U i n, U o, i L 1, i L 2, d 1, and d 2, respectively. The two pulse-width modulation signals are shifted by half a switching period, corresponding to a phase displacement of 180 ∘.

Under continuous-conduction-mode operation, both inductor currents remain continuous. The interleaving action partially cancels the input-current ripple and reduces the current stress of each phase, which makes this topology suitable for medium-power and high-power-density dc conversion.

Select the state variables as x = i L 1 , i L 2 , U o T. Neglecting device voltage drops, parasitic resistances, and switching delays, the averaged model of the two-phase interleaved Boost converter can be obtained as Equation 1:where the load current i C P L is Equation 2:

L 1 d i L 1 d t = U i n − 1 − d 1 U o L 2 d i L 2 d t = U i n − 1 − d 2 U o C o d U o d t = 1 − d 1 i L 1 + 1 − d 2 i L 2 − i C P L (1)

i C P L = P C P L U o (2)

When the parameters of the two phases are identical and the same duty ratio d 1 = d 2 = d, and inductances L 1 = L 2 = L b are adopted, the model can be written as Equation 3:

L b i ˙ L 1 = L b i ˙ L 2 = U i n − 1 − d U o C o U ˙ o = 1 − d i L 1 + i L 2 − i C P L (3)

By differentiating the load current with respect to the bus voltage, the equivalent load impedance can be obtained as Equation 4:

r C P L = Δ U o Δ i C P L = − U o 2 P C P L (4)

Because r C P L < 0, a decrease in U o causes the load current to increase, whereas an increase in U o causes the load current to decrease. This behavior counteracts the natural damping of the source-converter subsystem and can amplify dc-bus oscillations after source-voltage steps, load-power steps, or parameter variations. Therefore, the controller must provide not only zero steady-state voltage error but also adequate large-signal damping.

More specifically, for a CPL satisfying Equation 2, a downward perturbation of the bus voltage forces the load current to increase, which extracts more power from the output capacitor and further aggravates the voltage drop. This positive-feedback-like interaction is the physical origin of the reduced effective damping. In the proposed controller, the PBC inner loop increases the dissipative feedback associated with the inductor-current error, which helps counteract the negative damping introduced by the CPL. At the same time, the VDCM outer loop prevents a sudden change in the voltage error from being immediately converted into an aggressive current reference. As a result, the energy mismatch absorbed by the dc-bus capacitor is reduced during large disturbances.

2.2 Euler-Lagrange representation and storage function

Under ideal conditions, the driving signals of the two-phase power switches are identical, except that they are shifted by half a cycle in phase. Therefore, for the convenience of analyzing the passivity of the interleaved Boost converter system and designing the controller, a single-phase Boost circuit is taken as the analysis object in the following discussion. Define the state vector as Equation 5:where i L b is the current value on the single-phase boost inductor, U o is the output voltage value. Thus, the single-phase averaged model is Equation 6:

x = i L b U o (5)

L b i ˙ L = U i n − 1 − d U o C o U ˙ o = 1 − d i L − P C P L U o (6)

Its Euler-Lagrange form can be expressed as Equation 7:where M = L b 0 0 C o , d = 0 1 − d − 1 − d 0 , R x = 0 0 0 P C P L U o 2 , b = U i n 0 T.

M x ˙ + J d x + R x x = b (7)

Since J d T = − J d, it does not produce net energy; is a positive definite matrix, M representing the energy stored in the inductor and capacitor; R x is related to the constant power load, reflecting the energy dissipation at the output.

3 Composite controller design

3.1 Passivity analysis

The energy storage elements in the converter system include the boost inductor L b and the output filter capacitor C o. The system energy consists of the magnetic energy H L b stored in the inductor and the electric field energy H C stored in the capacitor as shown in Equation 8:

H x = 1 2 L b i L b 2 + 1 2 C o U o 2 (8)

Written in matrix form as Equation 9:

H x = 1 2 x T M x (9)

Differentiating the energy function can be expressed in Equation 10:

H ˙ x = x T M ẋ = x T u − J d x − R x x (10)

Since matrix J d is a skew-symmetric matrix that satisfies x T J d x = 0, it follows Equation 11:

H ˙ x = x T u − x T R x x = i L b U i n − P C P L (11)

Integrating the derivative of the energy function from 0 to t yields the energy distribution function of the converter in Equation 12:

H x t − H x 0 = ∫ 0 t U i n τ i L b τ d τ − ∫ 0 t P C P L τ d τ (12)

The left side of Equation 12 represents the stored energy, the first integral term on the right side is the supplied energy, and the second term is the dissipated energy. According to the energy distribution function, if the system-stored energy is less than the supplied energy at any time and the dissipated energy is always greater than 0, then the converter system is strictly passive.

3.2 Passivity-based current inner loop

Although the system-level energy model is useful for stability interpretation, the duty ratios are implemented separately for the two physical phases. Let x * = I L b r e f U o r e f, where I L b r e f is the reference value of the inductor current and U o r e f is the reference value of the output voltage. Taking the state vector error as e = x − x *, the error energy function can be expressed in matrix form as Equation 13:

H e x = 1 2 e T M e (13)

Combining Equation 7, the derivative of the error energy function can be obtained as Equation 14:

H ˙ e x = e T u − M x * − J e + x * − R x x * − e T R x e (14)

To accelerate the convergence of the error energy function to zero, damping injection is adopted to increase the system damping. The injected damping is Equation 15:

R a = R a 1 0 0 1 R a 2 (15)

The passivity-based controller u is designed as Equation 16:

u = M x * + J e + x * + R x x * − R a e (16)

At this point, the derivative of the error energy function can be expressed as Equation 17:

H ˙ e x = − e T R x + R a e ≤ 0 (17)

The error energy function is thus guaranteed to converge to zero, and the convergence speed is determined by the value of R x + R a. Therefore, to make the state variables converge quickly to their reference values, it is necessary to satisfy R x + R a > 0.

Due to the non-minimum-phase characteristic of the Boost converter, directly controlling the output voltage U 0 would lead to unstable zero dynamics of the system. In particular, when the load is open-circuited, the output voltage will continue to rise. Therefore, the first equation of (16) is selected as the duty-ratio control law for the passivity-based controller. The system duty-ratio control law is Equation 18:

d = 1 − U i n + R a 1 i L b − I L b r e f U o (18)

Substituting the duty-ratio control law into the average state-space mathematical model yields the relationship between the current and its reference value as:

i L b − I L b r e f = e − R a 1 L b t (19)

Equation 19 demonstrates that the proposed passivity-based controller design method enables the inductor current to converge quickly to its reference value, thereby maintaining the global stability of the system.

When designing the final passivity-based controller for the interleaved Boost converter system in practice, the parallel current-sharing strategy needs to be further considered. Therefore, the final duty-ratio control law is set as:

d = 1 − U i n + R a 1 i L b 1 − I L b r e f 2 U o − U i n + R a 1 i L b 2 − I L b r e f 2 U o (20)

According to Equation 20, when the current of a certain phase exceeds the reference value, the numerator term increases, the duty cycle decreases, the inductor charging time is reduced, and the current is driven back toward the reference value; conversely, the duty cycle increases, forming an energy-dissipating feedback.

3.3 Virtual dc machine voltage outer loop

The PBC current inner loops improve the tracking stability of the inductor current. However, under large disturbances, if the voltage outer loop employs a conventional PI regulator, the transient impact on the bus voltage may be excessive. To address this, the output port of the converter is emulated as a virtual DC motor port, endowing the output voltage and output current with inertia and damping characteristics similar to those of a DC motor.

The topology of the interleaved Boost converter and its equivalent DC motor model are shown in Figure 2, where E a is the virtual back electromotive force, i a is the armature current, L a is the armature inductance, and R m is the equivalent resistance of the armature circuit.

The armature voltage equation of the virtual DC motor can be written as:where C T is the torque coefficient, ϕ is the magnetic flux per pole, and ω is the virtual mechanical angular velocity. The mechanical motion equation is:where J is the virtual moment of inertia, D is the virtual damping coefficient, and ω 0 is the rated mechanical angular velocity. The mechanical power and electromagnetic power are given, respectively, as:

U = E a + R m i a + L a d i a d t E a = C T ϕ ω (21)

J d ω d t = T m − T e − D ω − ω 0 (22)

P m = T m ω ≈ T m ω 0 P e = T e ω = E a i a (23)

Therefore, when the interleaved Boost converter adopts virtual DC motor control, the correspondences U o = U and i o = i a hold. By emulating the interleaved Boost converter in the form of a DC motor, the converter acquires external characteristics consistent with a DC motor, providing additional inertia and damping for the system and improving the stability of the DC bus voltage.

According to Equations 21–23, the block diagram of the voltage outer loop virtual DC motor control can be obtained as shown in Figure 3. It can be mainly divided into three parts. The first part is the bus voltage regulation module. First, the voltage error is obtained by comparing the reference value of the bus voltage U o r e f with the actual value U o. The bus voltage is regulated through a PI stage, and the output of the PI stage is multiplied by U o r e f to obtain the mechanical power P m of the virtual DC motor, from which the virtual mechanical torque T m is derived. The second part is the VDCM module. After inertia and damping simulation, the virtual armature current is obtained, which serves as the output current reference of the converter. The third part is the current conversion module. Without considering converter losses, the inductor current reference I L b r e f for the current loop is finally obtained.

3.4 Small-signal characteristics of the VDCM element

From Equations 21, 22, neglecting the influence of the self-inductance L a, the transfer function of the VDCM stage can be obtained as Equation 24:

G V D C M s = R m J R m s + C T φ 2 + D R m (24)

The VDCM stage thus behaves as a first-order inertial element, where the virtual inertia J corresponds to the time constant of the inertial element.

The transfer function of the PI stage in the bus voltage regulation module is Equation 25:

G P I s = K p 1 + K i 1 s (25)

Accordingly, the small-signal model of the virtual DC motor control can be drawn as shown in Figure 4.

From Figure 4, the transfer function between the output voltage deviation of the interleaved Boost converter and the inductor current deviation can be obtained as Equation 26:

G i n s = U o r e f 2 C T φ K p 1 s + K i 1 J R m ω 0 U i n s 2 + C T 2 φ 2 ω o + D R m ω 0 U i n s (26)

Draw the Bode plots of the system under different inertia coefficients J and different damping coefficients D, as shown in Figures 5, 6.

From Figure 5, it can be observed that as the inertia coefficient J increases, the magnitude-frequency characteristic of the system exhibits a gradual decrease in the cutoff frequency and a slower attenuation rate of the amplitude in the high-frequency band. This indicates that the system’s attenuation of high-frequency signals weakens, while its ability to smooth high-frequency noise improves. However, a larger inertia coefficient leads to a reduction in the system’s response speed, affecting its ability to rapidly track input signals. As J increases, the phase-frequency characteristic shows more pronounced changes in the phase curve within the high-frequency band. This suggests that the increased system inertia influences the phase margin; although the overall trend of phase variation remains consistent, a larger J results in a delayed response to high-frequency disturbances.

From Figure 6, it can be seen that as the damping coefficient D increases, the magnitude-frequency characteristic displays higher amplitudes in the low-frequency band. This indicates that the damping coefficient enhances the system’s ability to suppress low-frequency signals, thereby improving system stability. With an increase in D, the phase-frequency characteristic reveals a significant rise in phase within the low-frequency band, reflecting an improved phase margin, which further strengthens the system’s stability and disturbance rejection capability. Although a larger value can enhance system stability, an excessively large D may lead to a decrease in response speed and adversely affect transient performance.

4 Analysis of experimental results

4.1 Experimental platform

To evaluate the practical feasibility of the proposed control strategy, a 3 kW two-phase interleaved Boost converter prototype based on GaN power devices was developed. The prototype operates at a switching frequency of 500 kHz, with a rated input voltage of 96 V and a regulated dc-bus voltage of 270 V. The allowable input-voltage range is 80–120 V. The prototype has an approximate volume of 0.335 L, corresponding to a rated power density of approximately 9 kW/L. A digital signal processor was employed as the main controller. The measured variables included the input voltage, output voltage, two-phase inductor currents, and output current. Two PWM signals with a phase shift of half a switching period were generated to drive the two converter phases. The experimental setup, as shown in Figure 7, consisted of a programmable dc voltage source, an electronic load, an oscilloscope, a high-voltage differential probe, current probes, a thermal management system, and the converter prototype.

The experimental verification is arranged to support the claimed advantages under large disturbances from two aspects. First, the input-voltage step test covers the full allowable source-voltage range from 80 V to 120 V, representing severe source-side fluctuation. Second, the load-power step test changes the CPL from 3000 W to 100 W and back to 3000 W, representing a large load-side power transient. The PI + PI, PI + PBC, and VDCM + PBC comparisons are used to separate the contribution of the PBC current loop from that of the VDCM voltage loop.

The main simulation and experimental parameters are summarized in Table 1.

TABLE 1. Main system parameters.

4.2 Static performances under different loads

Experiments were conducted to verify the system under three operating conditions: no-load (with only a 10W dummy load), half-load (load power of 1500 W), and full-load (load power of 3000 W). All parameters except the load power were kept consistent, and the input voltage was fixed at the rated input voltage U _*in* = 96 V. The main circuit waveforms under light-load, half-load and full-load conditions are shown in Figures 8–10 respectively.

• No-load (with only a 10 W dummy load)
• Half load (load power: 1500 W)
• Full load (load power: 3000 W)

It can be seen from the experimental results that the converter operates in the discontinuous working mode under no-load conditions (with only a 10 W dummy load), and the inductor current enters the discontinuous mode periodically. This operating mode causes significant fluctuations in the output voltage. As the load power increases, the discharge current of the output capacitor rises, and the fluctuation range of the capacitor voltage increases accordingly. Therefore, the voltage fluctuation under full load is greater than that under half load. Overall, within the full power range under steady-state conditions, the fluctuation of the output voltage is within 1% and the fluctuation of the inductor current is within 40%, which meets the design requirements. Hence, the composite control strategy combining VDCM and PBC enables the system to achieve excellent steady-state performance.

4.3 Response to input-voltage steps

The response of the converter to large input-voltage variations was first investigated under the rated load condition, with the constant-power load fixed at P _*CPL* = 3000W. Two sets of experimental comparisons were conducted. First, the PI + PI and PI + PBC controllers were compared to evaluate the contribution of the passivity-based current loop. The corresponding experimental waveforms are shown in Figure 11.

Compare the PI + PBC control and VDCM + PBC control. With the load power fixed at the rated load power P _*CPL* = 3000W, observe the variation trend of the output voltage U _*o* as the input voltage U _*in* changes. The experimental results are shown in Figure 12.

When the load power is fixed at 3000 W, the input voltage steps from 80 V to 120 V within 0.03 s, and steps back to 80 V from 120 V at 0.05 s. This operating condition is used to simulate the converter’s bus voltage regulation capability when the fuel cell port voltage fluctuates drastically. The results are shown in Table 2.

TABLE 2. Dynamic performance of output voltage under sudden changes of input voltage.

As can be seen from Table 2, after replacing the traditional current PI controller with PBC, the voltage deviation during the rise and fall of the input voltage is reduced by approximately half, and the recovery time is shortened. This indicates that the inner-loop energy dissipation control is more suitable for strong disturbance stability control under CPL conditions than the linear PI inner loop. With the further introduction of VDCM, the voltage deviation drops from 3.7% to 1.5%, which proves that virtual inertia and damping can effectively suppress the rapid transmission of disturbances from the input source to the output bus. The recovery time of VDCM + PBC is 6 m, slightly longer than that of PI + PBC but obviously shorter than PI + PI. This result reflects the main characteristic of VDCM control: it significantly mitigates voltage spikes at the cost of a slight reduction in recovery speed. Quantitatively, when the input voltage changes from 80 V to 120 V, VDCM + PBC reduces the peak voltage deviation from 8.9% with PI + PI and 3.7% with PI + PBC to 1.5%, corresponding to reductions of approximately 83.1% and 59.5%, respectively. When the input voltage changes from 120 V to 80 V, the deviation is reduced from 8.9% to 3.7%–1.8%, corresponding to reductions of approximately 79.8% and 51.4%. The trade-off is that the settling time of VDCM + PBC is slightly longer than that of PI + PBC in some cases because the virtual inertia intentionally slows the current-reference variation. Nevertheless, the settling time remains within 6 m and is still shorter than or comparable to that of the PI + PI benchmark, while the peak voltage deviation is significantly reduced.

4.4 Response to load-power steps

Compare the PI + PI control and PI + PBC control. Set the input voltage to the rated value U _*in* = 96V, and observe the variation trend of the output voltage U _*o* as the load power P _*CPL* changes. The experimental results are shown in Figure 13.

Compare the PI + PBC control and VDCM + PBC control. Set the input voltage to the rated input voltage U _*in* = 96V, and observe the variation trend of the output voltage U _*o* as the load power P _*CPL* changes. The experimental results are shown in Figure 14.

When the input voltage is fixed at 96V, the load power drops sharply from 3000W to 100W within 0.03 s and then rises abruptly back to 3000W within 0.05 s. This operating condition is used to simulate the bus voltage stability during large-range switching of task loads and rapid changes of the post-stage power electronic loads. The simulation results are shown in Table 3.

TABLE 3. Dynamic performance of output voltage under sudden load power change.

Sudden load changes exert a more severe impact on the DC bus than sudden input voltage fluctuations. Under PI + PI control, sudden load decrease and increase result in a voltage deviation of 13.3% with a recovery time of approximately 10 m. The PBC inner loop reduces the deviation to 7.4% and shortens the recovery time to 5 m. This is because PBC directly constrains the error energy of the inductor current, enabling the energy input of the converter to match the power demand of the load side more rapidly. The combination of VDCM and PBC further lowers the voltage deviation to 1.1%, which indicates that the VDCM outer voltage loop can suppress abrupt changes in the current reference via virtual inertia the moment a load mutation occurs, and the damping term then dissipates oscillatory energy, thus mitigating the peak deviation of the bus voltage.

The quantitative comparison further shows the advantage of the proposed method under load-side large disturbances. For the 3000 W–100 W load step, VDCM + PBC reduces the peak deviation from 13.3% with PI + PI and 7.4% with PI + PBC to 1.1%, corresponding to reductions of approximately 91.7% and 85.1%. For the 100 W–3000 W load step, the deviation is reduced from 13.3% to 5.9%–1.5%, corresponding to reductions of approximately 88.7% and 74.6%. The settling time increases to 7 m compared with PI + PBC, which reflects the damping-inertia trade-off of VDCM. However, this moderate sacrifice in response speed is acceptable because it greatly reduces the voltage stress and the possibility of overvoltage or undervoltage protection activation.

Furthermore, in extreme simulations where the load power suddenly rises to three times the rated power, the PI current inner loop generates limit cycle oscillations and eventually leads to system instability. In contrast, the PBC inner loop can still restore the output voltage to its rated value. This result demonstrates that under the impact of high-power constant power loads (CPL), relying solely on a linear current loop cannot guarantee large-signal stability, while the energy constraint mechanism of passivity-based control features stronger resistance to negative damping.

5 Results

This paper proposes a composite control scheme combing VDCM and PBC to stabilize the DC bus of interleaved Boost converters with CPLs. The established converter model reveals that the negative impedance of CPLs weakens system damping and triggers severe voltage fluctuations under disturbances. The designed PBC current loop demonstrates superior dynamic performance and stability than conventional PI control, maintaining normal operation even under extreme overload. By incorporating VDCM in the voltage outer loop, the composite VDCM + PBC control introduces virtual inertia and damping, which effectively suppresses voltage deviations amid input voltage steps, load transients and inductance variations. Although the response speed is slightly reduced, it effectively prevents false activation of overvoltage and undervoltage protection. Experiments on a 3 kW GaN-based prototype verify the excellent performance of the proposed strategy under both dynamic and steady-state conditions. Combining the large-signal stability of PBC and the fluctuation suppression capability of VDCM, this scheme is well suited for high-power-density DC power systems.

The experimental results provide quantitative evidence for these conclusions. Under input-voltage steps over the full 80–120 V range, the maximum peak voltage deviation of VDCM + PBC is limited to 1.8%, whereas PI + PI and PI + PBC reach 8.9% and 3.7%, respectively. Under load-power steps between 100 W and 3000 W, the maximum peak deviation of VDCM + PBC is 1.5%, compared with 13.3% for PI + PI and 7.4%/5.9% for PI + PBC. Although the settling time of VDCM + PBC is slightly increased compared with PI + PBC in some cases, the results demonstrate a more favorable compromise between transient voltage suppression and recovery speed.

Future work will address parasitic parameters, digital control delay and impedance coupling of parallel converters, and explore adaptive parameter tuning to further improve the practicability of the control strategy.

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Footnotes

Edited by: Jiawei Chen, Chongqing University, China

Reviewed by: Yihao Wan, Royal Institute of Technology, Sweden

Xiaoqiang Li, China University of Mining and Technology, China